The present invention relates to the field of programmable devices, and the systems and methods for programming the same. Programmable devices, such as FPGAs, typically includes thousands of programmable logic cells that use combinations of logic gates and/or look-up tables to perform a logic operation. Programmable devices also include a number of functional blocks having specialized logic devices adapted to a specific logic operations. The logic cells and functional blocks are interconnected with a configurable switching circuit. The configurable switching circuit selectively routes connections between the logic cells and functional blocks. By configuring the combination of logic cells, functional blocks, and the switching circuit, a programmable device can be adapted to perform virtually any type of information processing function.
A typical design cycle for determining the configuration of a programmable device, referred to compilation, starts with an extraction phase, followed by a logic synthesis phase, a fitting phase, and an assembly phase. The extraction phase takes a user design, typically expressed as a netlist in a hardware description language such as Verilog or VHDL, and produces a set of logic gates implementing the user design. In the logic synthesis phase, the set of logic gates is permutated over the hardware architecture of the programmable device in order to match elements of the user design with corresponding portions of the programmable device. The fitting phase assigns the various portions of the user design to specific logic cells and functional blocks and determines the configuration of the configurable switching circuit used to route signals between these logic cells and functional blocks, taking care to satisfy the user timing constraints as much as possible. In the assembly phase, a configuration file defining the programmable device configuration is created. The configuration can then be loaded into a programmable device to implement the user design.
To satisfy the design goals of a user design, one or more additional optimization phases can be used to optimize the user design. Optimization phases can optimize a user design with respect to a number of different design goals, including as overall execution speed, programmable device resource consumption, and power consumption. To yield greater performance of the user design as implemented by the programmable device, it is often desirable to process the user design with two or more optimization phases.
Previously, a number of different optimization techniques were applied to the user design. This approach strives to ensure that complex user designs satisfy as many design goals as possible. However, applying numerous optimization techniques takes a large amount of time to complete. This increases the time need to compile user designs, even relatively simple user designs with more modest design goals.
Additionally, optimization techniques typically optimize user designs to meet two or more design goals. Typically, this requires some tradeoffs between design goals. Previously, these optimization techniques used a predetermined tuning to provide good results for multiple design goals for typical user designs. However, this tuning may waste optimization efforts by focusing large amounts of optimization efforts unnecessarily on design goals that are relatively easy to achieve while neglecting design goals that are much more difficult. As a result, additional time and optimization steps are needed to meet all of the design goals.
Another previous approach tailors optimization phases to user designs by classifying user designs using quantitative metrics associated with one or more design goals, such as timing, fitting, and power consumption. User designs are classified into “easy,” “hard,” or other categories based on the results of the quantitative metric. User designs can be assigned to different categories for each of its design goals. The system includes optimization phases tuned to each of the different categories or combinations of categories that can be potentially assigned to user designs. Based on the categories assigned to a given user design, the system selects one or more of the set of optimization phases and applies the selected optimization phases to the given user design. The Quartus II Version 4.0 design software produced by the Altera Corporation includes an implementation of this approach.
It is therefore desirable for a system and method to tailor optimization phases to individual user designs. It is also desirable for the system and method to reduce the compilation time of user designs. It is further desirable for the system and method to allocate the optimization efforts for a user design according to the relative difficulty of design goals. It is desirable for the system and method to be adapted to any type of optimization phase applied to the user design at any point in the compilation process.